In May 8, 2012, promote the use ≈Ω≥of TSV ( TSV ) 3D laminated to a new gener↓ ↔ation of DRAM " Hybrid Memory Cube ( HMC ) Hybr±✘$§id Memory Cube Consortium " popularity ( HMC‌↑C ) announced that the United States,≤♥'✘ software giant Microsoft has joi‍β®ned the association.

　　HMC is the three-dimensional≤→ α structure, the logic chip alγ₹ong the vertical direction superposit→©↔ ion of multiple DRAM chips, and then through the ↓'TSV connection wiring techn ←©ology. HMC 's biggest characteristic i↓£'£s compared with existing DRAM, performβ≥∞ance can be greatly improved. The r♣"¶®easons there are two, one is between chips from​σ semiconductor package wiring dist ®∞<ance on a board on the trad™φitional methods of " cm " units are subst≤↔☆÷antially reduced to dozens ofμ m～ 1mm; two is&♥§ on a chip to form 1000 to tens of thousands of®φ$ TSV, realize the multipoint conn★♠×ection chip.

　　Microsoft 's accession to the HM•λCC, because we are considering how t≤¥o corresponding is likely to become ←↕☆a personal computer and a computer to‍™ improving the performance of " memory bot ©tleneck " problem. Memory bottle×±®​neck refers to as the microproc≠™•₹essor performance through multiple nu ≈§cleation and constantly im§↓≥prove, the architecture of the DRAM perfo✔•rmance will not be able to meet th&÷e need of processor. If do not  ""solve this problem, can occur even if th£€♦‍e computer new product, the actual perfo₩₽$±rmance is also not appropriate promotion situatλ♥↓γion. Compared with it, if thδ>§e TSV based on the application of HMC i★©β&n computer main memory, the data transmission s¶±≈peed can be increased to the current DRAMλβ∞✔ is about 15 times, therefo ✘∞re, is not just a giant Microsoft, American  ≠ companies such as Intel are also activ™↑$∞e in research using HMC.

　　In fact, plans to use TSV not only for HMC ©•✘and other DRAM products. According to the semico✘§&nductor manufacturers plan, in the < next few years, borne from electronic equipment  ₹input function of the CMOS se & ×nsor to the responsible for the operations of ≤$→FPGA and multi core proces•©¶♦sor, and in charge of product stoα§↑rage of DRAM and NAND flash will have to im₽γ>♣port TSV. If the plan goes ahe↓γad, TSV will assume the input, operation, storag§δe and other electronic equipment m ↓$₩ain function.

　　In May 8, 2012, promote the ® use of TSV ( TSV ) 3D laminatedΩ  to a new generation of DRAM " Hybrid Me≤ ≥'mory Cube ( HMC ) Hybrid Memory ×₩★Cube Consortium " popularity ( HM↔✘CC ) announced that the Unit<€σed States, software giant Micrπ₹osoft has joined the association.

　　HMC is the three-dimensional β$≤structure, the logic chip along the vertical €'>&direction superposition of multiple→↔ DRAM chips, and then througδ h the TSV connection wiring technol ≥ogy. HMC 's biggest characteristic ↔ Ω>is compared with existing ☆™≠DRAM, performance can be greatly ≤‍☆improved. The reasons there are two, one♣§ is between chips from semiconductor pacα≤₩↓kage wiring distance on a board on the trad£∞♥↑itional methods of " cm " ¥$units are substantially reduced to dozens ofμ ★‍"m～ 1mm; two is on a chip to form 1000 t‍∞o tens of thousands of TSV, reali∑♠ze the multipoint connection chip.

　　Microsoft 's accession to the HMCC, bec§"ause we are considering how to corresponding is‍¶π likely to become a personal c"™omputer and a computer to improvinφ$g the performance of " memory bottlene♣'ck " problem. Memory bottleneck refers to as the ↔©microprocessor performance ±♥©≈through multiple nucleation a≥✘nd constantly improve, the architecture of ♣®φthe DRAM performance will πβ♣&not be able to meet the need of proc®α♦↓essor. If do not solve this problemγ↕<÷, can occur even if the computer new product, theαφ α actual performance is also not appropriat<∏e promotion situation. Compared with ¥£₹it, if the TSV based on the applic₩•≤βation of HMC in computer mai'$​n memory, the data transmissδ>π ion speed can be increased to the current ♦‍DRAM is about 15 times, there≈©fore, is not just a giant ♥φ ↕Microsoft, American companies such​"" as Intel are also active in resea≤δ✘rch using HMC.

　　In fact, plans to use TSV not only for☆←σ HMC and other DRAM products. Accordλ‍γ€ing to the semiconductor manufactu βrers plan, in the next few years, borne from el≠♣ectronic equipment input funΩ↑★×ction of the CMOS sensor to the responsi♦×α•ble for the operations of FPGA a'≤nd multi core processor, and in charge of ≠ €product storage of DRAM an♣♠d NAND flash will have to §Ωimport TSV. If the plan goes ahead±>π, TSV will assume the input, operation, storε✘<age and other electronic equiγ♦pment main function.